In this course, we will study the various 8086 Pin Diagrams that are present in the 8086 microprocessor and its functioning. So let us start.
There are 40 pins that are present in the 8086 microprocessor. There are 20 pins on each side of the IC.
These are the multiplexed bidirectional address or data bus. During the time T1, the lines carry a 16-bit address and in the remaining clock cycles, they carry data. AD0-AD7carries the lower order byte of data and the AD8-AD15 carries the higher-order byte of data.
A16/S3, A17/S4, A18/S5, and A19/S6 are the multiplexed unidirectional address and status bus. During the time T1, they carry the higher-order 4-bit address and in the remaining clock, they carry status signals.
BHE/S7 is the fifth status signal. BHE stands for bus high enable. BHE is an active low signal. It is used to indicate the transfer of data over a higher-order data bus. It is multiplexed with the status pin S7.
It is a read signal used for performing the read operation. It is an active low signal.
Ready is an acknowledgment signal from the input/output devices. It is an active-high signal. Whenever we receive the ready signal it indicates that the device is ready to transfer the data.
It is a system reset. It is an active high signal. When the signal is high the system enters into the reset state and stops the current activity.
It is an interrupt request signal. It is an active high signal. It is level triggered.
It is a non-maskable interrupt signal. It is an active high signal. It is edge-triggered.
It is used to test the status of math coprocessors of 8087. The BUSY pin of 8087 is connected with this pin. If the signal is high the processor goes in the waiting state.
It provides the basic timing for processor operation. There are various frequencies like 5Hz, 8Hz, and 10Hz.
VCC is the power supply signal and VSS is the ground signal.
The 8086 microprocessor works in two modes- minimum and maximum mode. If this pin is high the processor works in minimum mode and if it is low then it will work in maximum mode.
It is an interrupt acknowledgment signal. When the processor receives an interrupt signal it acknowledges the interrupt by generating this signal. It is an active low signal.
It is an address latch enable signal. It indicates that the valid address is available on the bus. It is an active high signal.
It is a data enable signal. This signal is used to enable the 8286 transceivers. The transceiver is used to separate the data from the address/data bus. It is an active low signal.
This is a data transmit/receive signal. This signal decides in which direction data flows through the receiver. When the signal is high the data is transmitted out and when it is low the data is received in.
This signal is issued by the microprocessor to distinguish memory access from the i/o access. When the signal is high the memory is accessed and when it is low the i/o devices are accessed.
It is a write signal. It is used to write data in memory or output devices. It is an active low signal.
It is a hold acknowledgment signal. It is issued after receiving the hold signal. It is an active high signal.
When the DMA controller needs to use the address/data bus, it sends a request to the CPU through this pin. It is an active high signal.